Navitas Semiconductor has launched its 5th-generation GeneSiC technology platform, a 1200 V SiC MOSFET line based on what the company calls Trench-Assisted Planar (TAP) architecture. The design combines the ruggedness of a planar gate structure with the performance benefits of a trench in the source region. The headline improvement is a 35% better RDS(on) x… Read more…